160 lines
4.5 KiB
Diff
160 lines
4.5 KiB
Diff
From: Michal Simek <michal.simek@amd.com>
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Date: Fri, 1 Nov 2024 10:17:58 +0100
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Subject: [PATCH] arm64: zynqmp: Generate u-boot.itb and QSPI image via binman
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u-boot.itb has been generated via mkimage_fit_atf.sh but it is on the way
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out that's why convert it's description to binman.
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Compare to script binman description is not able to configure BL31 and BL32
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load/entry addresses which should be done separately.
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Signed-off-by: Michal Simek <michal.simek@amd.com>
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Link: https://lore.kernel.org/r/90b613796aee38158252c8bb1dfc3da0420f089d.1730452668.git.michal.simek@amd.com
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Upstream: https://source.denx.de/u-boot/u-boot/-/commit/a4c98119109a60b9b236996f47065aa8fc0de9ca
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---
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arch/arm/dts/Makefile | 1 +
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arch/arm/dts/zynqmp-binman.dts | 111 +++++++++++++++++++++++++++
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configs/xilinx_zynqmp_virt_defconfig | 3 +
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3 files changed, 115 insertions(+)
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create mode 100644 arch/arm/dts/zynqmp-binman.dts
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index 4653b5bdd16..f4e4149e85c 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -472,6 +472,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-02-revA.dtb
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dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-03-revA.dtb
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dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-04-revA.dtb
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dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-05-revA.dtb
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+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-binman.dtb
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zynqmp-sc-vek280-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vek280-revA.dtbo
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zynqmp-sc-vek280-revB-dtbs := zynqmp-sc-revC.dtb zynqmp-sc-vek280-revB.dtbo
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diff --git a/arch/arm/dts/zynqmp-binman.dts b/arch/arm/dts/zynqmp-binman.dts
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new file mode 100644
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index 00000000000..df0fdf46510
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--- /dev/null
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+++ b/arch/arm/dts/zynqmp-binman.dts
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@@ -0,0 +1,111 @@
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+// SPDX-License-Identifier: GPL-2.0
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+/*
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+ * dts file for Xilinx ZynqMP platforms
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+ *
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+ * (C) Copyright 2024, Advanced Micro Devices, Inc.
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+ *
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+ * Michal Simek <michal.simek@amd.com>
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+ */
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+
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+#include <config.h>
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+
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+/dts-v1/;
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+/ {
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+ binman: binman {
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+ multiple-images;
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+
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+ /* u-boot.itb generation in a static way */
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+ itb {
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+ filename = "u-boot.itb";
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+ pad-byte = <0>;
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+
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+ fit {
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+ description = "Configuration for Xilinx ZynqMP SoC";
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+ fit,align = <0x8>;
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+ fit,external-offset = <0x0>;
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+ fit,fdt-list = "of-list";
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+ images {
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+ uboot {
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+ description = "U-Boot (64-bit)";
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+ type = "firmware";
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+ os = "u-boot";
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+ arch = "arm64";
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+ compression = "none";
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+ load = /bits/ 64 <CONFIG_TEXT_BASE>;
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+ entry = /bits/ 64 <CONFIG_TEXT_BASE>;
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+ hash {
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+ algo = "md5";
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+ };
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+ u-boot-nodtb {
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+ };
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+ };
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+ atf {
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+ description = "Trusted Firmware-A";
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+ type = "firmware";
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+ os = "arm-trusted-firmware";
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+ arch = "arm64";
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+ compression = "none";
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+ load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
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+ entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
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+ hash {
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+ algo = "md5";
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+ };
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+ atf-bl31 {
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+ optional;
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+ };
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+ };
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+ tee {
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+ description = "OP-TEE";
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+ type = "tee";
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+ arch = "arm64";
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+ compression = "none";
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+ os = "tee";
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+ load = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
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+ entry = /bits/ 64 <CONFIG_BL31_LOAD_ADDR>;
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+ tee-os {
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+ optional;
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+ };
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+ };
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+ @fdt-SEQ {
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+ description = "NAME";
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+ type = "flat_dt";
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+ arch = "arm64";
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+ compression = "none";
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+ load = <0x0 0x100000>;
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+ hash-1 {
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+ algo = "md5";
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+ };
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+ };
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+ };
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+ configurations {
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+ default = "@conf-DEFAULT-SEQ";
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+ @conf-SEQ {
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+ description = "NAME";
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+ firmware = "atf";
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+ loadables = "tee", "uboot";
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+ fdt = "fdt-SEQ";
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+ };
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+ };
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+ };
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+ };
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+
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+#ifdef CONFIG_SYS_SPI_U_BOOT_OFFS
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+ /* QSPI image for testing QSPI boot mode */
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+ image {
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+ filename = "qspi.bin";
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+ pad-byte = <0>;
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+
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+ blob-ext@1 {
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+ offset = <0x0>;
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+ filename = "spl/boot.bin";
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+ };
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+ blob-ext@2 {
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+ offset = <CONFIG_SYS_SPI_U_BOOT_OFFS>;
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+ filename = "u-boot.itb";
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+ };
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+ fdtmap {
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+ };
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+ };
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+#endif
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+ };
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+};
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diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
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index cc298b200a1..2643ce2acf7 100644
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--- a/configs/xilinx_zynqmp_virt_defconfig
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+++ b/configs/xilinx_zynqmp_virt_defconfig
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@@ -243,3 +243,6 @@ CONFIG_EFI_SET_TIME=y
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CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
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CONFIG_EFI_CAPSULE_ON_DISK=y
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CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y
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+# CONFIG_SPL_BINMAN_SYMBOLS is not set
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+# CONFIG_BINMAN_FDT is not set
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+CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman.dtb"
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