from z80shortcuts import *

instructions = [None] * 256

for y in range(8):
    for z in range(8):
        if z == r.index("(HL)"): continue
        if y == 7: continue
        instructions[int(f"0b10{y:03b}{z:03b}", 2)] = {
            "name": f"{alu[y]} {r[z]}",
            "subins": [
                f_to_flatch,
                a_to_acu,
                mr_read(z) | c_qw["TMP_write_en"],
                alu_op(y,use_overflow=(y not in (4,5,6))) | mr_write(r.index("A")),
                flatch_to_f | c_qw["reset_m_state"] | c_qw["reset_context"]
            ]
        }

z=6
for y in range(8):
    if y == 7: continue
    instructions[int(f"0b10{y:03b}{z:03b}", 2)] = {
        "name": f"{alu[y]} (HL)",
        "subins": [
            exec_if_context | sr_read(sr.index("PC")) | mem_read | c_qw["ACU_write_en"] | c_qw["TMP_write_en"] | sr_write(sr.index("Z")),
            exec_if_context | sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),

            #sign extend
            exec_if_context | alu_op(alu.index("ADD")),
            exec_if_context | alu_op(alu.index("SBC")) | sr_write(sr.index("W")),

            exec_if_context | mr_read(r.index("L")) | c_qw["ACU_write_en"],
            exec_if_context | sr_read(sr.index("Z")) | c_qw["TMP_write_en"],
            exec_if_context | alu_op(alu.index("ADD")) | sr_write(sr.index("Z")),
            exec_if_context | mr_read(r.index("H")) | c_qw["ACU_write_en"],
            exec_if_context | sr_read(sr.index("W")) | c_qw["TMP_write_en"],
            exec_if_context | alu_op(alu.index("ADC")) | sr_write(sr.index("W")),

            f_to_flatch,
            a_to_acu,
            mr_read(r.index("(HL)")) | mem_read | c_qw["TMP_write_en"],
            alu_op(y,use_overflow=(y not in (4,5,6))) | mr_write(r.index('A')),
            flatch_to_f | c_qw["reset_m_state"] | c_qw["reset_context"]
        ]
    }

y = 7
for z in range(8):
    if z == r.index("(HL)"): continue
    instructions[int(f"0b10{y:03b}{z:03b}", 2)] = {
        "name": f"CP {r[z]}",
        "subins": [
            f_to_flatch,
            a_to_acu,
            mr_read(z) | c_qw["TMP_write_en"],
            alu_op(alu.index("SUB")),
            flatch_to_f | c_qw["reset_m_state"] | c_qw["reset_context"]
        ]
    }

y = 7
z = r.index("(HL)")
instructions[int(f"0b10{y:03b}{z:03b}", 2)] = {
    "name": f"CP (HL)",
    "subins": [
            exec_if_context | sr_read(sr.index("PC")) | mem_read | c_qw["ACU_write_en"] | c_qw["TMP_write_en"] | sr_write(sr.index("Z")),
            exec_if_context | sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),

            #sign extend
            exec_if_context | alu_op(alu.index("ADD")),
            exec_if_context | alu_op(alu.index("SBC")) | sr_write(sr.index("W")),

            exec_if_context | mr_read(r.index("L")) | c_qw["ACU_write_en"],
            exec_if_context | sr_read(sr.index("Z")) | c_qw["TMP_write_en"],
            exec_if_context | alu_op(alu.index("ADD")) | sr_write(sr.index("Z")),
            exec_if_context | mr_read(r.index("H")) | c_qw["ACU_write_en"],
            exec_if_context | sr_read(sr.index("W")) | c_qw["TMP_write_en"],
            exec_if_context | alu_op(alu.index("ADC")) | sr_write(sr.index("W")),
            f_to_flatch,
            a_to_acu,
            mr_read(r.index("(HL)")) | mem_read | c_qw["TMP_write_en"],
            alu_op(alu.index("SUB")),
            flatch_to_f | c_qw["reset_m_state"] | c_qw["reset_context"]
    ]
}