from z80shortcuts import * instructions = [None] * 256 z = 0 for y in range(8): instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"RET {cc[y]}", "subins": [ exec_if_cond(cc_i[cc[y]]) | c_qw["reset_m_state"] | c_qw["reset_context"], sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("PCL")), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("PCH")), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 1 q = 0 for p in range(3): instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": f"POP {rp2[p]}", "subins": [ sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | mem_read | mr_write((p*2)+1), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | mem_read | mr_write(p*2) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 1 q = 0 p = 3 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "POP AF", "subins": [ sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | mem_read | c_qw["F_write_en"], sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | mem_read | mr_write(r.index("A")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 1 q = 1 p = 0 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "RET", "subins": [ sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("PCL")), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("PCH")), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 1 q = 1 p = 1 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "EXX", "subins": [ c_qw["shadow_reg_tgl"] | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 1 q = 1 p = 2 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "JP (HL)", # actually jp to the address in hl "subins": [ exec_if_context | sr_read(sr.index("PC")) | mem_read | c_qw["ACU_write_en"] | c_qw["TMP_write_en"] | sr_write(sr.index("Z")), exec_if_context | sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), #sign extend exec_if_context | alu_op(alu.index("ADD")), exec_if_context | alu_op(alu.index("SBC")) | sr_write(sr.index("W")), exec_if_context | mr_read(r.index("L")) | c_qw["ACU_write_en"], exec_if_context | sr_read(sr.index("Z")) | c_qw["TMP_write_en"], exec_if_context | alu_op(alu.index("ADD")) | sr_write(sr.index("Z")), exec_if_context | mr_read(r.index("H")) | c_qw["ACU_write_en"], exec_if_context | sr_read(sr.index("W")) | c_qw["TMP_write_en"], exec_if_context | alu_op(alu.index("ADC")) | sr_write(sr.index("W")), mr_read(r.index("(HL)")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 1 q = 1 p = 3 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "LD SP, HL", "subins": [ mr_read(r.index("L")) | sr_write(sr.index("SPL")), mr_read(r.index("H")) | sr_write(sr.index("SPH")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 2 for y in range(8): instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"JP {cc[y]}, nn", "subins": [ sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("W")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), #early return f_to_flatch, exec_if_cond(cc_i[cc[(y)]]) | c_qw["reset_m_state"] | c_qw["reset_context"], sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 3 y = 0 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"JP nn", "subins": [ sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("W")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 3 y = 1 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"CB", "subins": [ c_qw["CB_prefix_set"] | c_qw["reset_m_state"] ] } z = 3 y = 2 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"OUT (n), A", "subins": [ sr_write(sr.index("W")), # clear W reg (unneeded for super optimization) sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), sr_read(sr.index("WZ")) | mr_read(r.index("A")) | io_write, c_qw["reset_context"] | c_qw["reset_m_state"] ] } z = 3 y = 3 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"IN A, (n)", "subins": [ sr_write(sr.index("W")), # clear W reg (unneeded for super optimization) sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), sr_read(sr.index("WZ")) | io_read | mr_write(r.index("A")), c_qw["reset_context"] | c_qw["reset_m_state"] ] } z = 3 y = 4 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"EX (SP), HL", "subins": [ sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("Z")), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("W")), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | mr_read(r.index("L")) | mem_write | c_qw["addr_inc_en"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | mr_read(r.index("H")) | mem_write | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("Z")) | mr_write(r.index("L")), sr_read(sr.index("W")) | mr_write(r.index("H")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 3 y = 5 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"EX DE, HL", "subins": [ mr_read(r.index("E")) | mem_read | sr_write(sr.index("Z")), mr_read(r.index("D")) | mem_read | sr_write(sr.index("W")), mr_read(r.index("L")) | mem_read | mr_write(r.index("E")), mr_read(r.index("H")) | mem_read | mr_write(r.index("D")), sr_read(sr.index("Z")) | mr_write(r.index("L")), sr_read(sr.index("W")) | mr_write(r.index("H")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 3 y = 6 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"DI", "subins": [ c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 3 y = 7 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"EI", "subins": [ c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 4 for y in range(8): instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"CALL {cc[y]}, nn", "subins": [ sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("W")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), #early return f_to_flatch, exec_if_cond(cc_i[cc[(y)]]) | c_qw["reset_m_state"] | c_qw["reset_context"], sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("PCH")) | c_qw["TMP_write_en"], sr_read(sr.index("SP")) | tmp_to_db | mem_write, sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("PCL")) | c_qw["TMP_write_en"], sr_read(sr.index("SP")) | tmp_to_db | mem_write, sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 5 q = 0 for p in range(3): instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": f"PUSH {rp2[p]}", "subins": [ sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | mem_write | mr_read(p*2), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | mem_write | mr_read((p*2)+1) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 5 q = 0 p = 3 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "PUSH AF", "subins": [ sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | mr_read(r.index("A")) | mem_write, sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("SP")) | c_qw["F_read_en"] | mem_write | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 5 q = 1 p = 0 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "CALL nn", "subins": [ sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("W")), sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("PCH")) | c_qw["TMP_write_en"], sr_read(sr.index("SP")) | tmp_to_db | mem_write, sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")), sr_read(sr.index("PCL")) | c_qw["TMP_write_en"], sr_read(sr.index("SP")) | tmp_to_db | mem_write, sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 5 q = 1 p = 1 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "DD", "subins": [ c_qw["reset_context"], c_qw["DD_prefix_set"] | c_qw["reset_m_state"] ] } z = 5 q = 1 p = 2 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "ED", "subins": [ c_qw["reset_context"], c_qw["ED_prefix_set"] | c_qw["reset_m_state"] ] } z = 5 q = 1 p = 3 instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = { "name": "FD", "subins": [ c_qw["reset_context"], c_qw["FD_prefix_set"] | c_qw["reset_m_state"] ] } z=6 for y in range(8): if y == 7: continue instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"{alu[y]} n", "subins": [ sr_read(sr.index("PC")) | mem_read | c_qw["TMP_write_en"] | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), f_to_flatch, a_to_acu, alu_op(y,use_overflow=(y not in (4,5,6))) | mr_write(r.index('A')), flatch_to_f | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 6 y = 7 instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"CP n", "subins": [ sr_read(sr.index("PC")) | mem_read | c_qw["TMP_write_en"] | c_qw["addr_inc_en"] | sr_write(sr.index("PC")), f_to_flatch, a_to_acu, alu_op(alu.index("SUB")), flatch_to_f | c_qw["reset_m_state"] | c_qw["reset_context"] ] } z = 7 for y in range(8): instructions[int(f"0b11{y:03b}{z:03b}", 2)] = { "name": f"RST {y*8:02X}h", "subins": [ sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("PC")), sr_read(sr.index("PC")) | c_qw["ACU_write_en"] | c_qw["addr_inc_en"] | sr_read(sr.index("PC")), internal_byte_to_db(internal_byte.index("C7")) | c_qw["TMP_write_en"], alu_op(alu.index("SUB"),save_flags=False) | sr_write(sr.index("Z")), sr_write(sr.index("W")), sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"] ] }