363 lines
13 KiB
Python
363 lines
13 KiB
Python
from z80shortcuts import *
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instructions = [None] * 256
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z = 0
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for y in range(8):
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"RET {cc[y]}",
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"subins": [
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exec_if_cond(cc_i[cc[y]]) | c_qw["reset_m_state"] | c_qw["reset_context"],
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sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("PCL")),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("PCH")),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 1
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q = 0
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for p in range(3):
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": f"POP {rp2[p]}",
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"subins": [
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | mem_read | mr_write((p*2)+1),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | mem_read | mr_write(p*2) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 1
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q = 0
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p = 3
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "POP AF",
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"subins": [
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | mem_read | c_qw["F_write_en"],
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | mem_read | mr_write(r.index("A")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 1
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q = 1
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p = 0
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "RET",
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"subins": [
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sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("PCL")),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("PCH")),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 1
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q = 1
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p = 1
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "EXX",
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"subins": [
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c_qw["shadow_reg_tgl"] | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 1
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q = 1
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p = 2
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "JP (HL)", # actually jp to the address in hl
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"subins": [
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exec_if_context | sr_read(sr.index("PC")) | mem_read | c_qw["ACU_write_en"] | c_qw["TMP_write_en"] | sr_write(sr.index("Z")),
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exec_if_context | sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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#sign extend
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exec_if_context | alu_op(alu.index("ADD")),
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exec_if_context | alu_op(alu.index("SBC")) | sr_write(sr.index("W")),
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exec_if_context | mr_read(r.index("L")) | c_qw["ACU_write_en"],
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exec_if_context | sr_read(sr.index("Z")) | c_qw["TMP_write_en"],
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exec_if_context | alu_op(alu.index("ADD")) | sr_write(sr.index("Z")),
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exec_if_context | mr_read(r.index("H")) | c_qw["ACU_write_en"],
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exec_if_context | sr_read(sr.index("W")) | c_qw["TMP_write_en"],
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exec_if_context | alu_op(alu.index("ADC")) | sr_write(sr.index("W")),
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mr_read(r.index("(HL)")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 1
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q = 1
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p = 3
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "LD SP, HL",
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"subins": [
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mr_read(r.index("L")) | sr_write(sr.index("SPL")),
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mr_read(r.index("H")) | sr_write(sr.index("SPH")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 2
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for y in range(8):
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"JP {cc[y]}, nn",
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"subins": [
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("W")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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#early return
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f_to_flatch,
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exec_if_cond(cc_i[cc[(y)]]) | c_qw["reset_m_state"] | c_qw["reset_context"],
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sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 3
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y = 0
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"JP nn",
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"subins": [
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("W")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 3
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y = 1
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"CB",
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"subins": [
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c_qw["CB_prefix_set"] | c_qw["reset_m_state"]
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]
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}
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z = 3
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y = 2
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"OUT (n), A",
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"subins": [
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sr_write(sr.index("W")), # clear W reg (unneeded for super optimization)
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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sr_read(sr.index("WZ")) | mr_read(r.index("A")) | io_write,
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c_qw["reset_context"] | c_qw["reset_m_state"]
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]
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}
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z = 3
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y = 3
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"IN A, (n)",
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"subins": [
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sr_write(sr.index("W")), # clear W reg (unneeded for super optimization)
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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sr_read(sr.index("WZ")) | io_read | mr_write(r.index("A")),
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c_qw["reset_context"] | c_qw["reset_m_state"]
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]
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}
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z = 3
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y = 4
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"EX (SP), HL",
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"subins": [
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sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("Z")),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | mem_read | sr_write(sr.index("W")),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | mr_read(r.index("L")) | mem_write | c_qw["addr_inc_en"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | mr_read(r.index("H")) | mem_write | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("Z")) | mr_write(r.index("L")),
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sr_read(sr.index("W")) | mr_write(r.index("H")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 3
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y = 5
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"EX DE, HL",
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"subins": [
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mr_read(r.index("E")) | mem_read | sr_write(sr.index("Z")),
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mr_read(r.index("D")) | mem_read | sr_write(sr.index("W")),
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mr_read(r.index("L")) | mem_read | mr_write(r.index("E")),
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mr_read(r.index("H")) | mem_read | mr_write(r.index("D")),
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sr_read(sr.index("Z")) | mr_write(r.index("L")),
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sr_read(sr.index("W")) | mr_write(r.index("H")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 3
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y = 6
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"DI",
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"subins": [
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c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 3
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y = 7
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"EI",
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"subins": [
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c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 4
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for y in range(8):
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"CALL {cc[y]}, nn",
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"subins": [
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("W")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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#early return
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f_to_flatch,
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exec_if_cond(cc_i[cc[(y)]]) | c_qw["reset_m_state"] | c_qw["reset_context"],
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("PCH")) | c_qw["TMP_write_en"],
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sr_read(sr.index("SP")) | tmp_to_db | mem_write,
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("PCL")) | c_qw["TMP_write_en"],
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sr_read(sr.index("SP")) | tmp_to_db | mem_write,
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sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 5
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q = 0
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for p in range(3):
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": f"PUSH {rp2[p]}",
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"subins": [
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | mem_write | mr_read(p*2),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | mem_write | mr_read((p*2)+1) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 5
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q = 0
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p = 3
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "PUSH AF",
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"subins": [
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | mr_read(r.index("A")) | mem_write,
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("SP")) | c_qw["F_read_en"] | mem_write | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 5
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q = 1
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p = 0
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "CALL nn",
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"subins": [
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("Z")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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sr_read(sr.index("PC")) | mem_read | sr_write(sr.index("W")),
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("PCH")) | c_qw["TMP_write_en"],
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sr_read(sr.index("SP")) | tmp_to_db | mem_write,
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sr_read(sr.index("SP")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("SP")),
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sr_read(sr.index("PCL")) | c_qw["TMP_write_en"],
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sr_read(sr.index("SP")) | tmp_to_db | mem_write,
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sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 5
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q = 1
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p = 1
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "DD",
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"subins": [
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c_qw["reset_context"],
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c_qw["DD_prefix_set"] | c_qw["reset_m_state"]
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]
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}
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z = 5
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q = 1
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p = 2
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "ED",
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"subins": [
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c_qw["reset_context"],
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c_qw["ED_prefix_set"] | c_qw["reset_m_state"]
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]
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}
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z = 5
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q = 1
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p = 3
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instructions[int(f"0b11{((p<<1)+q):03b}{z:03b}", 2)] = {
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"name": "FD",
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"subins": [
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c_qw["reset_context"],
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c_qw["FD_prefix_set"] | c_qw["reset_m_state"]
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]
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}
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z=6
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for y in range(8):
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if y == 7: continue
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"{alu[y]} n",
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"subins": [
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sr_read(sr.index("PC")) | mem_read | c_qw["TMP_write_en"] | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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f_to_flatch,
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a_to_acu,
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alu_op(y,use_overflow=(y not in (4,5,6))) | mr_write(r.index('A')),
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flatch_to_f | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 6
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y = 7
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"CP n",
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"subins": [
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sr_read(sr.index("PC")) | mem_read | c_qw["TMP_write_en"] | c_qw["addr_inc_en"] | sr_write(sr.index("PC")),
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f_to_flatch,
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a_to_acu,
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alu_op(alu.index("SUB")),
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flatch_to_f | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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}
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z = 7
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for y in range(8):
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instructions[int(f"0b11{y:03b}{z:03b}", 2)] = {
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"name": f"RST {y*8:02X}h",
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"subins": [
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sr_read(sr.index("PC")) | c_qw["addr_inc_en"] | c_qw["addr_dec"] | sr_write(sr.index("PC")),
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sr_read(sr.index("PC")) | c_qw["ACU_write_en"] | c_qw["addr_inc_en"] | sr_read(sr.index("PC")),
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internal_byte_to_db(internal_byte.index("C7")) | c_qw["TMP_write_en"],
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alu_op(alu.index("SUB"),save_flags=False) | sr_write(sr.index("Z")),
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sr_write(sr.index("W")),
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sr_read(sr.index("WZ")) | sr_write(sr.index("PC")) | c_qw["reset_m_state"] | c_qw["reset_context"]
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]
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} |